ROHM’s 5th‑Gen SiC MOSFETs Target High-Temperature Efficiency in EV and Server Power

ROHM has introduced its fifth generation of EcoSiC silicon carbide MOSFETs, aiming squarely at power stages that must sustain performance at elevated junction temperatures. The new devices cut on-resistance by roughly 30% at 175°C relative to the company’s previous (4th‑gen) parts at comparable breakdown voltage and die area.

ROHM positions the family for EV traction inverters and other electric powertrain blocks, as well as high‑density power supplies in AI servers and industrial equipment.

Lower Conduction Loss at 175°C for Traction Inverters and Server PSUs

High coolant temperatures and aggressive thermal transients are a reality in modern EV drivelines and tightly packed rack power shelves. Conduction loss, which scales with RDS(on), can dominate the efficiency budget in these conditions, especially at modest switching frequencies and high phase currents. By reducing R_DS(on) by about one‑third at a junction temperature of 175°C, ROHM’s latest SiC MOSFETs give designers more margin before thermal derating clips deliverable torque or output power.

That improvement can translate to smaller heat sinks, relaxed cooling requirements, or higher allowable peak current—system‑level levers that improve power density without sacrificing reliability. ROHM attributes the gain to device-structure refinements and process optimizations carried over the generational transition, a path that preserves breakdown capability while lowering channel resistance at temperature.

While ROHM has not disclosed specific capacitance or charge figures, the reduction in hot R_DS(on) is particularly relevant for traction inverter phases that experience long conduction intervals and for server power stages operating in thermally constrained sleds. In both cases, lower channel resistance at temperature reduces I²R losses when the device is carrying high current near its thermal ceiling.

For context, SiC technology inherently maintains lower resistance growth versus silicon as temperature rises, a characteristic that makes the technology well suited to high‑temperature environments common in automotive and industrial deployments.

Process and Portfolio Evolution from Early SiC to 5th Generation

ROHM’s SiC program is not new. The company began mass production of SiC MOSFETs in 2010 and subsequently expanded into automotive‑qualified parts complying with AEC‑Q101. Its 4th‑generation devices, sampled from mid‑2020, gained design‑ins across automotive and industrial platforms in both discrete and module form factors.

The 5th‑generation release continues this cadence, retaining the voltage classes used widely in traction inverters, OBCs, DC‑DC converters, and industrial drives, while improving high‑temperature conduction performance without increasing the die. For development teams already on ROHM’s SiC roadmap, that offers a path to incremental efficiency gains and potential BOM reductions without resorting to major topology changes.

The announcement also reflects a staged commercialization plan. ROHM began supporting customers with 5th‑generation bare dies in 2025 and completed device development in March 2026. Discrete and module samples are slated for July 2026, with further breakdown‑voltage and package options to follow.

For OEMs balancing design freezes with next‑cycle efficiency targets, the timeline signals when to expect risk‑reduction builds and characterization parts for inverter and PSU prototypes. Third‑party coverage of the release aligns with ROHM’s schedule and application focus, indicating coordinated availability across both die‑level and packaged offerings.

Implications for EV Drivelines, AI Server Racks, and Industrial Power

In traction inverters, the practical value of a lower hot R_DS(on) shows up during worst‑case operating points: high DC bus voltage, elevated coolant temperature, and sustained RMS phase current. Under these conditions, designers often widen the silicon‑carbide die window (or parallel devices) to contain conduction loss and junction rise.

A device family that delivers a ~30% resistance reduction at 175°C can allow a smaller die to meet the same thermal limits, improving cost and enabling tighter inverter packaging. For motor control strategies that rely on field‑weakening at high speeds, lower conduction loss can also extend the torque‑speed envelope without increasing switching frequency.

5th‑Gen SiC MOSFETs reduce on-resistance at high temperature

On the data center side, AI training clusters have driven PSU power density and rack thermal load sharply higher. Power stages in these systems must remain efficient under sustained thermal stress and airflow constraints.

Lower R_DS(on) at temperature reduces conduction‑dominated losses in synchronous rectification legs and primary switches, freeing up thermal headroom for transient load steps and ambient excursions. The net effect can be improved rack‑level PUE contributors and greater design flexibility in power shelf mechanicals.

ROHM’s application list reflects these priorities, citing power supplies for AI servers and data centers, as well as PV inverters, UPS, energy storage systems, and industrial servos—applications where thermal operating points and efficiency at load are central to cost of ownership.

Practical Design Considerations

Engineers evaluating a generational device swap will focus on the usual multi‑variable trade space: channel resistance versus charge metrics (Q_g, Q_oss), output capacitance behavior during hard commutation, short‑circuit withstand, and avalanche energy.

Even when conduction loss dominates, switching and dynamic behavior can set limits on gate‑drive strategy and snubber design, especially in fast EV inverter legs. Although ROHM’s initial disclosure emphasizes high‑temperature R_DS(on), the company’s SiC lineage includes trench‑gate and process features aimed at balancing conduction and switching losses—an expectation that design teams will seek to validate as samples arrive.

For thermal validation, the most direct comparison is at equal breakdown voltage and comparable die area under identical cooling, mirroring the conditions cited for the 30% improvement claim.

Availability and Next Steps for Power System Architects

According to ROHM, development of the 5th‑generation devices concluded in March 2026, with discrete and module sampling in July 2026 and broader lineup expansion planned thereafter. Teams targeting 2027 model‑year EV platforms or the next refresh of AI power shelves can use the interim to qualify bare dies or early samples, re‑optimize conduction‑loss budgets at high temperature, and revisit thermal margins and parallel‑device strategies.

The family’s positioning across traction inverters, OBCs, DC‑DC converters, and high‑power industrial supplies suggests compatibility with existing topologies while offering incremental efficiency at the hot end of the operating curve.

ROHM’s 5th‑gen SiC MOSFETs do not redefine the application space so much as compress thermal and efficiency constraints within it—useful headroom in EV and server designs where every kelvin and every watt count.